Become an ASIC Digital Design Expert at Synopsys, where you can work hybrid or fully remotely. Focus your skills on high-speed SerDes design and architect next-generation digital logic solutions.
At Synopsys, an established leader in engineering solutions, your extensive experience will define design standards and methodologies. Mentoring junior engineers and collaborating closely with verification teams will be integral to your role. You will ensure that the digital designs you architect successfully address complex performance and power requirements.
Key Responsibilities:
• Architect high-speed digital subsystems for SerDes IP
• Define specifications from system-level requirements
• Manage design flow and power optimization strategies
• Collaborate directly with verification for testplan definitions
• Analyze and debug complex digital and analog interfaces
Requirements:
• Master’s degree in Electrical Engineering or equivalent
• 10+ years of digital ASIC design experience
• Proficient in Verilog or VHDL
• Deep knowledge of clock domain crossing practices
• Familiarity with contemporary high-speed interfaces
Drive innovation in connectivity solutions and contribute to Synopsys's mission of empowering technology.
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