Senior Asic Design Verification Engineer - Lpu (Toronto)

Senior Asic Design Verification Engineer - Lpu (Toronto)

19 Aug
|
NVIDIA
|
Toronto

19 Aug

NVIDIA

Toronto

Senior ASIC Design Verification Engineer to verify the design and implementation of inference accelerators using advanced methodologies and tools like SystemVerilog and UVM.

📌 Senior Asic Design Verification Engineer - Lpu (Toronto)
🏢 NVIDIA
📍 Toronto

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