Contribute to next-gen technology as a Senior RTL Design Engineer with AMD. This role focuses on advanced IP RTL design and AI-enhanced methodologies in multiple computing domains.We seek an experienced ASIC Design Engineer to partake in IP RTL design for our PCI Express technology serving diverse products. Your commitment to achieving quality and performance goals will be paramount as you innovate. Collaborate with architects and support verification processes, ensuring we meet ambitious project timelines. Your creative problem-solving skills will greatly enhance our development initiatives.Key Responsibilities:Design and implement PCI Express IP RTLWork closely with architects to innovate cutting-edge featuresIntegrate low-power design techniques for optimizationFocus on timing and design closure for quality assuranceSupport all stages of ASIC verification and debuggingRequirements:Hands-on Verilog HDL coding experienceFamiliarity with AI design strategiesExperience with multi-clock domain designsCompetence with lint and CDC verification toolsBachelor's or Master's in Electrical EngineeringLeverage your RTL design capabilities at AMD, shaping the technology of tomorrow.#J-18808-Ljbffr