Join Synopsys as a Senior SERDES Design Engineer where your passion for high-speed connectivity will drive innovation in analog circuits. Collaborate with a diverse team to create pioneering solutions.
In this influential role, you’ll work on the design and development of advanced SERDES IP, contributing to high-performance chips used across various applications. Your extensive background in CMOS technology and analytical problem-solving will help refine algorithms and circuit implementations.
You will play a critical part in producing silicon-proven designs for cutting-edge communication interfaces.
Key Responsibilities:
Design advanced calibration algorithms for transceivers
Optimize circuit implementations for area and efficiency
Develop comprehensive Ser Des system models
Oversee body layout to minimize variability
Validate circuit performance correlating simulation with measurements
Requirements:
M. Sc. or Ph.D. with 6+ years of SERDES experience
Proven expertise in analog designs for up-to-date communications
Solid circuit and system modeling skills
Effective communication abilities for documentation
Knowledge of relevant protocols and simulation tools
Utilize your expertise in analog design and be part of transformational projects at Synopsys, fostering cutting-edge solutions in high-speed communications.
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