Contribute to next-gen technology as a Senior RTL Design Engineer with AMD. This role focuses on advanced IP RTL design and AI-enhanced methodologies in multiple computing domains.
We seek an experienced ASIC Design Engineer to partake in IP RTL design for our PCI Express technology serving diverse products. Your commitment to achieving quality and performance goals will be paramount as you innovate. Collaborate with architects and support verification processes, ensuring we meet ambitious project timelines.
Your creative problem-solving skills will greatly enhance our development initiatives.
Key Responsibilities:
- Design and implement PCI Express IP RTL
- Work closely with architects to innovate cutting-edge features
- Integrate low-power design techniques for optimization
- Focus on timing and design closure for quality assurance
- Support all stages of ASIC verification and debugging
Requirements:
- Hands-on Verilog HDL coding experience
- Familiarity with AI design strategies
- Experience with multi-clock domain designs
- Competence with lint and CDC verification tools
- Bachelor's or Master's in Electrical Engineering
Leverage your RTL design capabilities at AMD, shaping the technology of tomorrow.