4 days ago Be among the first 25 applicants

We are looking for a

Senior FPGA Designer

to join a team building the next generation of

wireless ASICs and SoCs

powering products such as audio headsets, speakers, mice, proximity detection, ranging, and IoT devices.

In this role, you will

lead the design and implementation of complex digital circuits

within ASICs—covering architecture definition, RTL coding, synthesis, timing analysis, and close collaboration with verification and physical design teams. You will own critical design blocks or subsystems, ensure performance and power efficiency, and mentor junior engineers.

Missions & Responsibilities

Define ASIC architecture: functional blocks, data paths, and interfaces (performance, area, and power tradeoffs).

Write high-quality

RTL code

(Verilog, SystemVerilog, VHDL) that is maintainable and spec-compliant.

Perform

synthesis

and

static timing analysis (STA) , resolving timing-critical paths and optimizing design.

Collaborate with verification teams: provide documentation, testbench support, and debugging.

Guide and review the work of digital designers, ensuring quality standards.

Apply

power-aware design techniques

(clock gating, power domains, leakage reduction).

Work with the physical design team on constraints, layout reviews, and timing issues.

Take ownership of assigned design blocks/subsystems, ensuring timely delivery.

Contribute to design reviews and lead digital validation efforts.

Mentor and transfer knowledge within the team.

Profile Requirements

Bachelor’s or Master’s in Electrical Engineering (or equivalent).

10+ years

in digital ASIC circuit design, including





5+ years in a senior role .

Solid understanding of

digital logic design

(combinational/sequential circuits, FSMs, CDC).

Proficiency in

RTL coding

(Verilog, SystemVerilog, VHDL), with parameterized design and assertions.

Experience with

EDA tools

for simulation, synthesis, and STA.

Familiarity with the

ASIC design flow

(RTL → synthesis → P&R; → STA → post-silicon validation).

Knowledge of

DFT techniques .

Scripting with

Python .

Familiarity with

AMBA bus interconnects .

Lab debugging experience (protocol/logic analyzers, oscilloscopes).

Problem-solving skills for complex design challenges.

Excellent collaboration and communication across cross-functional teams.

Leadership and mentoring experience in ASIC design projects.

Why choose us

An international community bringing together more than 110 different nationalities

An environment where trust is central: 70% of our leaders started their careers at the entry level

A strong training system with our internal Academy and more than 250 modules available

A dynamic work environment that frequently comes together for internal events (afterworks, team buildings, etc.)

Amaris Consulting promotes equal opportunities. We are committed to bringing together people from diverse backgrounds and creating an inclusive work environment. In this regard, we welcome applications from all qualified individuals, regardless of sex, sexual orientation, race, ethnicity, beliefs, age, marital status, disability, or other characteristics.

Seniority level Mid-Senior level

Employment type Other

Job function Design

Industries IT Services and IT Consulting

#J-18808-Ljbffr

📌 FPGA Senior Designer - Concepteur FPGA Senior (Montreal)
🏢 Amaris Consulting
📍 Montreal