Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

Managing people and projects simultaneously energizes you. At Synopsys, you will lead a lab team validating memory IP that ships in products worldwide. Lead first silicon bring-up and validation for DDR6, DDR5, LPDDR6/X, LPDDR5/5X, MRDIMM, and HBM test chips Perform electrical characterization including eye diagrams, jitter measurements, timing margins, and signal integrity analysis Drive debug and root cause analysis of silicon, firmware, and board issues using lab instrumentation and cross-functional collaboration Build automated validation frameworks using Python and C/C++ to improve test efficiency and data collection Lead multilayer PCB design for characterization platforms and customer evaluation kits Manage team hiring, staffing, resource allocation, morale and audit preparation while growing technical capability Work alongside cross-functional teams including but not limited to stakeholders, marketing, sales, customers,



program/foundry as well as other lab managers and teams to weigh business impacts and make critical decisions Ensure Synopsys memory interface IP products meet performance and reliability standards before customer deployment Reduce time to market by building reusable test infrastructure that accelerates validation across IP generations Provide silicon-proven characterization data that gives customers confidence to integrate Synopsys IP Identify and resolve issues early, preventing costly re-spins and customer escalations Bachelor's degree in Electrical Engineering or equivalent technical field ~3+ years managing engineering teams, including hiring and resource allocation ~ Deep understanding of JEDEC specifications, jitter analysis, timing margins, and electrical characterization ~ Proficiency in Python and C for test automation and hardware validation scripting ~ Board design experience including multilayer PCB development, experience with automotive qualification standards or reliability testing is a plus ~ Experience in scheduling, event planning with vendors of all sorts You can walk into a lab, look at a failing test result, and within an hour have a hypothesis and a plan to prove it You balance project deadlines and team development without sacrificing either You are comfortable operating oscilloscopes, BERTs, and network analyzers, and expect your team to be equally hands-on The team operates at the intersection of design intent and real-world silicon behavior, and your work will directly inform product readiness and customer deployments.

📌 Validation / Verification Eng, Sr Supervisor - 18341 (Ottawa)
🏢 Synopsys
📍 Ottawa