Senior ASIC Design Engineer — AI/ML Hardware IP Architect (Toronto)

Senior ASIC Design Engineer — AI/ML Hardware IP Architect (Toronto)

15 Aug
|
Talentlab
|
Toronto

15 Aug

Talentlab

Toronto

Talentlab partners with a leading global semiconductor company to recruit a Staff ASIC Design Engineer for AI/ML hardware IP. The role emphasizes RTL design, micro-architecture development, and hardware integration with a focus on clock domain crossing, power optimization, and formal verification.

📌 Senior ASIC Design Engineer — AI/ML Hardware IP Architect (Toronto)
🏢 Talentlab
📍 Toronto

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|
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|
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|
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