Senior ASIC Physical Design Lead for SoC Tapeouts (Toronto)

Senior ASIC Physical Design Lead for SoC Tapeouts (Toronto)

15 Aug
|
Qualcomm
|
Toronto

15 Aug

Qualcomm

Toronto

Qualcomm Canada ULC is seeking a senior ASIC Physical Design engineer to lead end‑to‑end PD flows for SoCs and retimers. You will collaborate with front‑end, analog/SerDes, DFT, and packaging teams to drive tapeouts and ensure design convergence.

The role requires robust experience with CTS, DRC/LVS, and access to Cadence Innovus or Synopsys ICC2, plus scripting in Python or Tcl to automate flows.

📌 Senior ASIC Physical Design Lead for SoC Tapeouts (Toronto)
🏢 Qualcomm
📍 Toronto

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