13 Aug
|
Altera
|
Toronto
With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge.
As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry. Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our compiler and tools teams are central to enabling customers to efficiently map complex designs onto advanced FPGA architectures.
Altera is seeking a FPGA Compiler Engineer (Placer) to join our Compiler team in Toronto, Ontario Canada. This role focuses on developing and optimizing FPGA placement algorithms within the compiler toolchain, directly impacting performance, power efficiency, and overall design quality. The ideal candidate brings solid expertise in EDA algorithms, large‑scale system optimization, and FPGA/ASIC physical design flows, along with a passion for solving complex, performance‑critical problems.
Performance Optimization: Improve runtime performance, scalability, and quality of results (QoR) for large and complex customer designs. Develop and refine timing‑aware placement strategies to support high‑frequency, performance‑critical designs.
Debug & Analysis: Analyze placement quality, congestion hotspots, and timing bottlenecks; Work on core compiler technology that directly impacts FPGA performance and usability Collaborate with world‑class teams across architecture, silicon, and software The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job‑specific knowledge. In addition to base salary, we offer performance‑based incentive opportunities that reward both individual contributions and overall company success.
Estimated Salary Range: $129.1 – $187.0 CAD. We use artificial intelligence to screen, assess, or select applicants for the position. Canadian work experience is not required for this role. Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. ~6+ years of experience in FPGA/ASIC CAD, EDA tools, or related fields. ~ Experience in algorithms and data structures (optimization, graph theory, heuristics) ~ Experience in C/C++ and software engineering best practices ~ Experience with placement techniques (analytical placement, simulated annealing, partitioning, clustering) ~ Experience in solving complex, large‑scale optimization problems with high performance and scalability requirements.
Familiarity with routing and timing closure techniques Python, Tcl) for tooling and automation Shift Shift 1 (Canada) All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #
📌 FPGA Compiler (Placer) Engineer (Toronto)
🏢 Altera
📍 Toronto