Celero Communication Inc. is looking for a seasoned ASIC Verification Engineer to join our Ottawa team. Utilize your extensive knowledge in ASIC verification and SystemVerilog to ensure the integrity of cutting-edge optical transceiver designs.
In this senior role, you'll develop and execute verification plans while designing robust testbenches that are essential for our next-generation optical modems. Collaborate with cross-functional teams to tackle debugging and performance analysis, focusing on reliability and compliance with power requirements. Your insights will significantly impact the development of cutting-edge technologies.
Key Responsibilities:
• Lead development of verification plans for ASIC designs
• Design testbenches using SystemVerilog and UVM




• Validate functionality through creating and executing test cases
• Collaborate with cross-functional teams for debugging
• Conduct thorough coverage analysis to enhance verification
Requirements:
• Bachelor's degree in Electrical or Computer Engineering
• Over 3 years of ASIC verification background
• Expertise in Verilog, SystemVerilog, UVM
• Strong knowledge of verification flows and methodologies
• Understanding of low-power design principles
Bring your expertise to the forefront of semiconductor innovation at Celero in Ottawa.
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📌 Senior ASIC Verification Engineer Needed (Quebec City)
🏢 CELERO COMMUNICATIONS
📍 Quebec City