Become a Staff Engineer in ASIC Physical Design at Synopsys, where innovation shapes the future of semiconductor technology. Lead the development of test chips using advanced design techniques.In this pivotal role, you’ll be an integral part of the Test Chip PHY development team, bringing over 9 years of comprehensive ASIC experience. Your expertise will guide projects from RTL to GDSII, ensuring that Synopsys’s IP solutions meet the highest standards of performance and manufacturability.Key Responsibilities:
Contribute to the design implementation for test chips
Develop and optimize power and floorplan strategies
Ensure timing closure and perform detailed verification analyses
Automate the design flow to boost productivity
Prepare documentation and supporting views for tape-outRequirements:
9+ years in the ASIC design industry
Proficiency in physical design flow processes
Expertise in using CAD tools, including Calibre and RedHawk
Solid leadership skills for coordinating technical teams
US work authorization requiredShowcase your skills in a team-oriented and cutting-edge environment at Synopsys, where your contributions enhance product quality and accelerate time-to-market.#J-18808-Ljbffr

📌 Staff Engineer, Asic Physical Design Synopsys Ottawa
🏢 Synopsys
📍 Ottawa