Our client accelerates the future of digital innovation by powering mission‑critical data communication—supporting everything from AI to seamless video streaming to the metaverse. Their technology fuels advancements across data‑intensive industries including data centers, storage, networking, AI, 5G infrastructure, and autonomous vehicles. Known for their innovation and reliability, they partner with industry leaders to shape the next generation of digital products.

Architect, design, and verify DSPs using high‑speed mixed‑signal PHYs such as PCIe and Ethernet. Build scalable UVM testbench components for verifying complex RTL and firmware functionality. write test cases to optimize component control.



Own the full verification lifecycle—from creating and reviewing verification plans to implementation and sign‑off for tape‑out.

Collaborate with the design team to define verification requirements and scope of key features. Mentor junior engineers and contribute to a culture of technical excellence. Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related discipline.

Minimum of 9 years of ASIC design verification experience. Robust hands‑on experience building reusable testbenches with advanced debugging expertise. Familiarity with leading EDA tools and methodologies used in digital verification.

Bonus Points

For

📌 Staff Engineer, Design Verification Engineering (Toronto)
🏢 Talentlab
📍 Toronto