Job Overview:

Requirement/Must Have:

- Education: B.S./M.S./Ph.D. in Electrical Engineering, Computer Engineering, or related field.
- Experience: 10+ years in SoC validation (pre-silicon and/or post-silicon).
- Deep understanding of SoC architecture and IP integration concepts.

Responsibilities:

- Develop comprehensive verification and validation plans for SoC-level IP subsystems including Clock Generation/Distribution (PLLs, clock muxes, dividers), Reset Architecture, Ethernet MAC/PHY, and I/O interfaces (GPIO, I2C, SPI, UART, JTAG).
- Create and execute directed and constrained-random tests targeting IP integration, connectivity, and functional correctness at the SoC level.
- Verify clock domain crossings (CDC), reset sequencing, and power-on reset (POR) behavior.
- Validate Ethernet data path integrity, link negotiation, and MAC-to-PHY (MII/RGMII/SGMII) interfaces.
- Perform functional coverage analysis and drive coverage closure across IP blocks.
- Collaborate with design and architecture teams on RTL debug, assertions, and specification reviews.
- Execute validation on emulation/FPGA prototyping platforms (Palladium, Veloce, Protium) for early software/firmware integration.
- Bring up and validate SoC IPs on first silicon and platform boards.




- Develop and execute post-silicon test plans covering: Clock: PLL lock times, frequency accuracy, jitter characterization, clock switching, glitch-free mux transitions.
- Reset: Reset assertion/de-assertion sequencing, warm/cold reset flows, watchdog timer resets, brown-out detection.
- Ethernet: Link bring-up, auto-negotiation, packet integrity (CRC/FCS), throughput/latency, loopback testing, PTP/IEEE 1588 timestamping.
- I/O: Pin mux configuration, drive strength, voltage levels, protocol compliance (I2C/SPI/UART timing), interrupt routing.
- Debug silicon failures using oscilloscopes, logic analyzers, protocol analyzers, JTAG/DFx, and embedded trace tools.
- Perform root-cause analysis of post-silicon bugs and drive resolution with design and firmware teams.
- Characterize IP performance under varying voltage, frequency, and temperature (VFT) conditions.
- Develop and maintain automated test frameworks for regression and production testing.
- Collaborate with platform, firmware, BSP, and driver teams on system-level integration and debug.

Skills:

- Solid verbal and written communication skills.
- Excellent communication and presentation skills.
- Ability to communicate effectively with stakeholders.

📌 SOC Validation Engineer - Remote / Telecommute (Toronto)
🏢 Cynet Systems
📍 Toronto