Take on a pivotal role at Altera as an FPGA Development Engineer focusing on synthesis in Toronto, Ontario. Your expertise in RTL design will directly enhance FPGA compilation technology.As part of the Synthesis team, you'll be developing and optimizing algorithms to transform RTL into efficient hardware implementations. This position demands a blend of over 6 years in FPGA/ASIC design experience alongside solid proficiencies in Verilog or VHDL, combining hardware knowledge with software engineering capabilities.Key Responsibilities:Implement and enhance synthesis algorithms for RTL designsImprove the overall FPGA compiler flow through integrationDrive optimizations in performance, power, and areaCreate tools for analyzing complex RTL systemsCollaborate with architecture and validation teams for tool alignmentRequirements:6+ years experience in FPGA/ASIC or related domainsStrong experience with Verilog, SystemVerilog, or VHDLProficient in C/C++ for EDA toolsUnderstanding of timing analysis and optimizationDegree in Electrical, Computer Engineering, or similarChampion FPGA innovations at Altera, shaping the future of synthesis technology.#J-18808-Ljbffr

📌 Altera Fpga Development Engineer – Synthesis (Toronto)
🏢 191 Altera
📍 Toronto