AMD in Vancouver, BC, Canada is seeking a Digital Design Engineer to help design and implement PCIe IP for next-generation server, client, GPU, and semi-custom products.
The role covers RTL development from architecture through post-silicon bring-up, requiring robust Verilog/SystemVerilog skills and collaboration across global teams. Hybrid work arrangement and a commitment to engineering excellence are emphasized.
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📌 Innovative PCIe IP RTL Engineer (Vancouver)
🏢 AMD
📍 Vancouver
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