Lead FPGA architecture efforts as a Principal Engineer at a global telecommunications solutions provider. Utilize Verilog and VHDL to drive multi-Gbps design successes in this key role.This position seeks an experienced Principal FPGA Engineer dedicated to enhancing communications test and measurement products. You will define end-to-end FPGA architecture, making critical design decisions while mentoring junior engineers. Responsibilities also include leading complex debug efforts and ensuring timing closure for high-speed designs.Key Responsibilities:Own FPGA architecture for communications productsDrive end-to-end design using Verilog/SystemVerilog/VHDLMentor FPGA engineers and resolve technical challengesManage timing closure for multi-Gbps SerDes FPGA designsCollaborate on root-cause debug of silicon issuesRequirements:12-15 years in Electrical/Computer Engineering5+ years in high-speed FPGA design architectureExpertise with Ethernet/IP protocol stacksHands-on experience with AMD/Altera FPGA devicesStrong communication skills for global teamworkDrive advancing technologies in communications test with proven FPGA design, architecture experience, and mentoring expertise.#J-18808-Ljbffr

📌 Principal Fpga Engineer Communications Test (Ottawa)
🏢 Luxoft
📍 Ottawa