Become a Senior Digital ASIC Design Expert at Ciena, specializing in high-speed connectivity solutions. Work within a team-oriented framework while influencing future telecommunications tech.This influential position calls for a seasoned engineer to lead the design and integration of ASIC technologies for WaveLogic products. Engage with teams to develop RTL designs, enhance tech libraries, and validate prototypes in a lab environment.Key Responsibilities:Lead ASIC design and integration for WaveLogicCollaborate on architecture specifications with system engineersDevelop top-level RTL designs incorporating various IP blocksManage tool flows to support ASIC integration processesValidate designs through ASIC prototypes in a lab settingRequirements:Bachelor's degree in relevant engineering fieldOver 5 years of ASIC design experienceProficient in Verilog, SystemVerilog, and PythonStrong analytical skills related to timing and synthesisExcellent written and verbal communication abilitiesShape the future of networking technology while contributing to Ciena's mission.#J-18808-Ljbffr

📌 Ciena Senior Digital Asic Design Expert (Riviere-des-Prairies—Pointe-aux-Trembles)
🏢 Ciena
📍 Riviere-des-Prairies—Pointe-aux-Trembles