Lead the verification strategy for SERDES PHY IP at Synopsys. Blend advanced engineering skills with strategic oversight in a high-impact role.As a director-level verification manager, you will oversee a skilled team focusing on the intricacies of mixed-signal verification for SERDES PHY technology at Synopsys. The role demands a hands-on approach to debugging while mentoring engineers to develop their technical capabilities. Your direct involvement ensures a reliable verification process that matches customer expectations and product quality standards,



especially in high-performance silicon technologies.Key Responsibilities:Direct a team of mixed-signal verification engineersAddress regressions and technical concerns proactivelyUphold SERDES IP verification sign-off qualityEnhance verification methodologies for productive workflowsCollaborate effectively across multiple engineering teamsRequirements:10+ years of ASIC verification experience3+ years in a team lead capacityAdvanced knowledge of UVM, SystemVerilog, and verification flowsIn-depth experience with high-speed serial interfacesProficient in automation scripting languagesDrive technology verification and foster team growth at Synopsys as a verification director for SERDES PHY.#J-18808-Ljbffr

📌 Verification Director For Serdes Phy Systems (Mississauga)
🏢 Synopsys
📍 Mississauga