Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, PassageTM, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! We are hiring a Sr DFT Engineer to help us build high-performance ASICs for the next generation of AI acceleration systems. In this role, you will be responsible for physical design in leading-edge CMOS technology. This includes synthesis through place and route, timing closure, and tape-out signoff.ResponsibilitiesPerform Design For Test (DFT) insertion on ASIC designs, including internal scan, boundary scan, and memory BISTPerform automatic and targeted test pattern generationInterface with Physical Design and Front End (RTL) DesignPerform post-silicon DFT bring-up and test program debugInterface with ATE engineers for test program bring-up and debugScripting and automation of DFT and ATPG flowBe hands-on from the "nitty gritty" details to high level planning.RequirementsBachelor's degree in Electrical Engineering (or other related fields)Minimum of 13 years of industry experience working as a Design For Test Engineer on ASIC designsMust have completed at least 2 tapeoutsMinimum of 2 years of experience with standard DFT CAD tools and flowsHands-on experience in Python, TCL or other scripting environmentsDFT/post-silicon/ATPG with experience in both ASIC and semi-custom COT flowStrong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fieldsAbility to react to change and thrive in a rapid paced environmentPreferred qualificationsMasters degree in Electrical Engineering (or related fields) with 10+ years of DFT experienceExperience working on ASIC designs with multiple production-quality ASIC tapeoutsExperience interfacing with ATE engineersExperience with ATE test program developmentExperience with fault modelingUnderstanding of Timing, Physical Design, and Power impact of DFT structuresProven Knowledge of Basic SoC Architecture and HDL languages like SystemVerilog and chipware components to work hand in hand with RTL designersBenefitsComprehensive Health Care Plan (Medical, Dental & Vision)Retirement Savings Matching ProgramLife Insurance (Basic, Voluntary & AD&D)Generous Time Off (Vacation, Sick & Public Holidays)Paid Family LeaveShort Term & Long Term DisabilityTraining & DevelopmentCommuter BenefitsFlexible, hybrid workplace modelEquity grants (applicable to full-time employees)Benefits eligibility may vary depending on your employment status and location.Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.Export Control Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws. #J-18808-Ljbffr

📌 Sr. Design For Test (Dft) Engineer (Toronto)
🏢 Doist
📍 Toronto