Join Altera as the Static Timing Analysis Manager in Toronto, Ontario, focusing on high-performance FPGA designs. Lead team dynamics while ensuring timing analysis excellence and optimization.This pivotal role requires a seasoned qualified with a decade of experience in Static Timing Analysis. You will manage timing closure strategies, collaborate with interdisciplinary teams, and continuously refine STA methodologies to enhance design efficiency and quality.Key Responsibilities:Drive technical excellence in a high-performing STA teamOwn end-to-end STA processes for FPGA designsDefine and implement effective STA methodologies and flowsCollaborate with RTL, physical design, and architecture teamsFocus on enhancing performance and reducing power consumptionRequirements:10+ years in Static Timing Analysis for FPGA or ASIC designs3+ years in a leadership capacityProficiency with tools like PrimeTimeUnderstanding of RTL design and timing closure practicesDegree in Electrical or Computer Engineering requiredBring your advanced STA knowledge and leadership skills to Altera, contributing to groundbreaking FPGA technologies.#J-18808-Ljbffr

📌 Altera'S Static Timing Analysis Team Leader (Toronto)
🏢 Altera
📍 Toronto