CompanyQualcomm Canada ULCJob AreaEngineering Group, Engineering Group > ASICS EngineeringGeneral SummaryQualcomm enables a world where everyone and everything can be intelligently connected. As the world's leading wireless tech innovator, we push the boundaries of what's possible to enable next‐gen experiences and drive digital transformation to help create a smarter, connected future for all. Our roadmap of breakthrough technologies expands our mobile innovations and solutions to support virtually every connected device. With our leadership in wireless connectivity, high‐performance low‐power computing, and on‐device AI, we're powering the connected intelligent edge.Role & ResponsibilitiesContribute to IP verification during the pre/post silicon phase of next generation SOCCollaborate with design and software teams to debug and resolve issuesDesign and translate high level customer use to hardware specific verification plansDevelop and automate test plans; refactor and optimize test codeManage validation and testing of the driver/hardwareMigrate/integrate cross team drivers to new platforms as test requiredDelivery of low-level hardware drivers for Qualcomm Snapdragon Subsystems validationSupport post-silicon bring‐up, functional, and performance testingPerform power correlations, analysis and reportingSkillsYou will have a minimum of 1-3 years of experienceExperience in low level and/or embedded software development in C, C++, Assembly and Python.Experience with Windows and Linux OS environmentExperience in ARM, DSP processors, Windows/Linux environments.Experience in automation and test/integration methodologiesExperience developing/enhancing validation methodologies and infrastructure solutionsExperience with SCM tools (Git, Perforce),



and defect tracking (JIRA).Experience with digital and analog circuit is a strong assetGood communication skills (written and verbal)Strong debug skillsPreferred SkillsDeveloping and optimizing test framework and tools to create a controlled validation setting to support large scale validationDesigning and defining new validation strategy as well as detailed test plansHelp debug efforts for issues found during Pre‐silicon (FPGA) and Post‐siliconDefine, design, and execute platform Pre‐Silicon and Post‐Silicon validation plans for current and future productsDebug hardware/software issues using Lauterbach Trace32 (T32) for register access, memory analysis, and automation.Experience with low‐power modes, power/performance characterization, and correlation analysis.Minimum QualificationsBachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Equal Opportunity EmploymentApplicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.Compensation & BenefitsPay range: $124,200.00 - $174,200.00. This pay scale reflects the broad minimum to maximum pay range for this job code for the location for which it has been posted. In addition, Qualcomm offers a competitive annual discretionary bonus program and opportunity for annual RSU grants. The highly competitive benefits package is designed to support your success at work, at home, and at play. #J-18808-Ljbffr

📌 Compute Dsp/Ai Subsystem Validation Engineer (Engineer Level And Up) (Markham)
🏢 Qualcomm
📍 Markham