Senior Logic Design Engineer – Pcie Gen6/Gen7 (Hybrid) (Montreal)

Senior Logic Design Engineer – Pcie Gen6/Gen7 (Hybrid) (Montreal)

07 Aug
|
Rambus.com
|
Montreal

07 Aug

Rambus.com

Montreal

Rambus, a premier chip and silicon IP provider, seeks a Senior Member of Technical Staff in Montreal to lead logic design for PCIe Gen6/Gen7 switch IP. You will drive architecture, RTL, and verification efforts, collaborating across architecture, verification, software, and customer teams.You will mentor engineers, contribute to design reviews, and help ensure timing closure, CDC/RDC, and power-management features across advanced process nodes. This is a full time hybrid role in Montreal. #J-18808-Ljbffr

📌 Senior Logic Design Engineer – Pcie Gen6/Gen7 (Hybrid) (Montreal)
🏢 Rambus.com
📍 Montreal

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