Drive innovation at Cognichip as a Senior FPGA Design Engineer, merging chip technology with machine learning. Take the lead on creating libraries that guide AI in chip design processes. This hybrid role involves high-level collaboration across engineering disciplines, and you will design libraries, benchmarks, and ecosystems essential for enhancing design workflows.

With 5-10 years of hands-on experience in RTL design, you will apply your skills in developing robust testbenches and automating design processes using SystemVerilog and Python. Engage with a talented team to push the boundaries of AI in chip technology.

Key Responsibilities





- Translate silicon design constraints with cross-functional teams • Develop and maintain RTL libraries and benchmarks • Create verification environments using industry tools • Design architecture and workflows to employ AI optimization • Build datasets for AI to improve design accuracy Requirements:
- Bachelor's or Master's in a related field • 5-10 years of in-depth experience • Advanced knowledge of SystemVerilog and Python • Familiarity with AMD/Xilinx and Altera/Intel workflows • Solid communication and troubleshooting skills Join Cognichip to pioneer the future of AI and silicon design in Toronto.

📌 Cognichip Senior FPGA Design Opportunity (Ontario)
🏢 Cognichip
📍 Ontario