Advance your career at AMD as a Design Verification Engineer in Vancouver, Markham, or Ottawa. In this hybrid role, collaborate on complex multi-subsystem IP verification and enhance performance features through innovative solutions.
You will work closely with performance architects, design engineers, and verification teams to ensure next-generation products exceed expectations. This position emphasizes IP-level ASIC verification, debugging, and automation workflows. Engage in cross-team collaborations across UTC time zones to drive performance verification strategy and execution.
Key Responsibilities:
• Collaborate with engineers to verify new performance features • Create and review test plan documentation for accuracy • Manage backlogs and lead project scrum meetings • Develop innovative ideas for process improvement • Debug functional and performance test failures
Requirements: • Proficient in IP level ASIC verification • Experience with Verilog, System Verilog, C, C++ • Robust understanding of UVM concepts and testbenches • Familiar with scripting languages like Perl or Ruby • Bachelor's or Master's in Computer or Electrical Engineering
Elevate your expertise in performance verification while contributing to AMD’s groundbreaking technologies. #J-18808-Ljbffr