Design Engineer I: Digital Ics & Systemverilog - $76,000 - $114,000 A Year (Saskatoon)

Design Engineer I: Digital Ics & Systemverilog - $76,000 - $114,000 A Year (Saskatoon)

06 Aug
|
Microchip Technology
|
Saskatoon

06 Aug

Microchip Technology

Saskatoon

Design digital circuits and verify specifications using advanced methods, System Verilog implementation. Competitive salary with perks.

📌 Design Engineer I: Digital Ics & Systemverilog - $76,000 - $114,000 A Year (Saskatoon)
🏢 Microchip Technology
📍 Saskatoon

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