05 Aug
|
United States Digital Space
|
London
05 Aug
United States Digital Space
London
Job Description
Microchip's FPGA software engineering team is at the forefront of developing advanced Electronic Design Automation (EDA) software, empowering customers to program and optimize Microchip FPGAs. Our comprehensive software suite supports the entire FPGA design flow—from initial design entry and synthesis, through place-and-route, timing analysis, power optimization, and simulation—enabling users to achieve high-performance, reliable solutions.
Within this team, the High-Level Synthesis (HLS) group is driving innovation in system‐level FPGA design. Our SmartHLS tool enables customers to describe hardware accelerators in C/C++, which are then compiled into efficient FPGA implementations using state‐of‐the‐art LLVM/MLIR compiler infrastructure.
The Polar Fire System Designer further expands design possibilities, providing a robust platform for building complete SoC solutions that seamlessly integrate RISC‐V processors with FPGA‐based hardware accelerators, while supporting comprehensive system‐level verification.
As a Software Engineer on our team, you will play a pivotal role in shaping the future of FPGA design tools. Your primary focus will be on compiler development (LLVM/MLIR‐based), with opportunities to contribute to broader SoC design and verification workflows.
You will collaborate closely with talented engineers in an agile, supportive workplace, tackling complex technical challenges that directly impact customer productivity and accelerate time‐to‐market. This position offers significant opportunities for professional growth, innovation,
and making a tangible difference in the EDA industry.
The software engineering team is based in Toronto. The Microchip office is located in the downtown financial core at 67 Yonge Street.
Responsibilities
- Develop, verify, and maintain advanced analysis and transformation passes for our state‐of‐the‐art high‐level synthesis (HLS) compiler, enabling the generation of high‐performance FPGA designs.
- Optimize HLS‐generated hardware architectures to enhance power efficiency, performance, and area utilization of the resulting hardware circuits.
- Analyze complex, real‐world customer applications created with high‐level synthesis to identify opportunities for performance and area improvements.
and implement new HLS features as needed.
Requirements / Qualifications
Minimum Qualifications
- BS, MS, or PhD in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of software engineering experience.
- Excellent programming skills, with proficiency in C/C++.
- Strong knowledge of compilers, with at least 2 years of hands‐on experience working with LLVM/MLIR.
- Solid understanding of algorithms and data structures.
- Strong background in digital design principles.
Preferred Qualifications
- Experience working with MLIR is highly desirable.
- In‐depth, hands‐on experience with FPGAs.
- Familiarity with high‐level synthesis (HLS) tools.
- Proficiency with Git for source code version control.
- Experience with scripting languages such as Python, Bash, or TCL.
- Comfortable working on large‐scale software development projects in both Linux and Windows environments.
Travel Time
0% - 25%
Pay Range
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry‐leading IESPP program with a 6‐month look‐back feature.
The annual base salary range for this position is $90,000 - $140,000. Range is dependent on numerous factors including job location, skills and experience.
Ontario Accommodation
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📌 Senior Engineer - Software (London)
🏢 United States Digital Space
📍 London