About Ciena

As the global leader in high-speed connectivity, Ciena is committed to a people‑first approach. Our teams enjoy a culture focused on prioritizing a flexible work setting that empowers individual growth, well‑being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Role: Analog Layout Engineer

The Wavelogic family of products are widely used in Ciena's optical fiber transmission solutions and are one of the main contributors to Ciena's success in the telecommunications industry. This role involves working on advanced high‑speed analog design circuits in the latest deep‑submicron CMOS and/or BiCMOS technologies, driving and implementing best‑in‑class high‑speed analog layouts that extract the highest performance from the world’s most advanced CMOS and BiCMOS technologies.

Responsibilities

- Carry out layout feasibility studies on various circuit designs in collaboration with senior analog designers, exploring trade‑offs in discussion with team members.
- Create layouts of assigned analog blocks by adhering to the steps of floor planning, placement and routing.
- Conduct thorough verification checks such as DRC, ANT, LVS, PERC, EM, IR to ensure the final layout possesses the highest level of quality.
- Investigate new features within the layout tools and processes used for creating layouts with the aim of enhancing productivity.
- Provide regular status updates, participate in team meetings and share experiences with the rest of the group.





Qualifications

- Bachelor's degree in Electrical Engineering or related field, with 1‑5 years of relevant industry experience.
- Experience in custom analog and mixed‑signal layout design with strong knowledge of deep sub‑micron CMOS devices (e.g., FinFET transistors).
- Experience in custom layout design of Analog/Mixed Signal designs (e.g., ADC, DAC, PLL, SERDES).
- Proficiency in using industry‑standard layout tools (e.g., Cadence Virtuoso, Siemens Calibre, Ansys Totem) and familiarity with layout design flows for advanced technology nodes.
- Strong analytical and problem‑solving skills to identify and address layout‑related issues efficiently.
- Proficient in layout techniques for floor planning, device matching, minimizing parasitics, RF shielding, EM, IR drop, ESD and high‑frequency routing.
- Meticulous attention to detail, ensuring the highest level of accuracy and quality in all layout designs.
- Familiarity with semiconductor manufacturing processes and foundry technologies.
- Strong communication and interpersonal skills to collaborate with cross‑functional teams.
- Strong team player, positive can‑do attitude,



and ability to seamlessly integrate into an existing team culture.
- Familiarity with guard rings, DNW, PN junctions, advanced process effects such as LOD, OSE, WPE.
- Proficiency in interpreting DRC, PERC, ANT, ERC, and LVS; ability to identify failure‑prone circuit and layout structures and proactively work with circuit designers to resolve them.
- Scripting skills in PERL or SKILL are a plus, but not required.

Performance and Working Conditions

The above statements are intended to describe the work being performed by people assigned to this job. They are not intended to be an exhaustive list of all responsibilities, duties, and skills required. The duties and responsibilities of this position are subject to change and other duties may be assigned or removed at any time.

Pay Range

The annual salary range is $114,000 – $182,000 CAD.

Benefits

- Medical, dental, and vision plans
- 401(k) (USA) & DCPP (Canada) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company‑paid holidays, paid sick leave, and vacation time
- Paid Family Leave and other leaves of absence as required by law

EEO Statement

Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

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📌 Senior Analog Layout Engineer (Ottawa)
🏢 Ciena
📍 Ottawa