Principal Engineer-Firmware (Burnaby)

Principal Engineer-Firmware (Burnaby)

05 Aug
|
FHLB Des Moines
|
Burnaby

05 Aug

FHLB Des Moines

Burnaby

Job Overview

Microchip is looking for an energetic and self‑motivated Firmware Engineer to work in our open and uniquely supportive work environment. As a Firmware Developer in Microchip’s Datacenter Solutions business unit, you will work on products that deploy leading edge technologies such as CXL, NVMe, DDR, PCIe, and RAID for cloud hyper‑scalers, Tier 1 and OEM customers. The role involves firmware development for embedded SoC systems and support for pre‑silicon and post‑silicon debugging.

Responsibilities

- Specification of features and architecture of firmware components for new products
- Design, develop, integrate, debug, and verify state‑of‑the‑art quality firmware for embedded SoC systems
- Collaborate with other firmware teams and interact with chip design, validation and application engineering teams on pre‑silicon firmware development and post‑silicon debug/troubleshooting
- Create and participate in design and code reviews
- Utilize analyzers and firmware debug tools to troubleshoot difficult problems reported internally by test/development teams and by global customers
- Write comprehensive engineering design documentation and customer user guides
- Assist in the execution and evolution of the development process

Qualifications

- Bachelor’s degree in Electrical Engineering, Computer Engineering or equivalent




- 8+ years industry experience in embedded firmware development
- Strong C language programming and aptitude for debugging embedded system issues
- Knowledge of RTOS constructs including threads, scheduling, synchronization, memory management
- Excellent analytical, problem‑solving, and documentation skills
- Effective communicator of technical ideas, both verbal and written
- Self‑motivated and team‑oriented with the ability and resourcefulness to achieve goals with minimal supervision
- Capable of working with customers and technology partners in the architecture phase and in feature design

Desired Experience

- Knowledge of Agile development process
- Knowledge of high‑speed serial protocols such as PCIe and/or SAS/SATA
- Experience with RISC/MIPS architectures, ThreadX RTOS and SoC peripheral protocols

Travel

0% – 25%

Compensation

The annual base salary range for this position is $86,000 to $186,000. *Range is dependent on numerous factors including job location, skills and experience.

Benefits

We offer a total compensation package that includes competitive base pay, restricted stock units, quarterly bonus payments, health advantages that begin day one, retirement savings plans and an industry‑leading IESPP program with a 6‑month look back feature.

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📌 Principal Engineer-Firmware (Burnaby)
🏢 FHLB Des Moines
📍 Burnaby

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