Lead the verification strategy for SERDES PHY IP at Synopsys. Blend advanced engineering skills with strategic oversight in a high-impact role.
As a director-level verification manager, you will oversee a skilled team focusing on the intricacies of mixed-signal verification for SERDES PHY technology at Synopsys. The role demands a hands-on approach to debugging while mentoring engineers to develop their technical capabilities. Your direct involvement ensures a reliable verification process that matches customer expectations and product quality standards, especially in high-performance silicon technologies.
Key Responsibilities:
• Direct a team of mixed-signal verification engineers
• Address regressions and technical concerns proactively




• Uphold SERDES IP verification sign-off quality
• Enhance verification methodologies for productive workflows
• Collaborate effectively across multiple engineering teams
Requirements:
• 10+ years of ASIC verification experience
• 3+ years in a team lead capacity
• Advanced knowledge of UVM, SystemVerilog, and verification flows
• In-depth experience with high-speed serial interfaces
• Proficient in automation scripting languages
Drive technology verification and foster team growth at Synopsys as a verification director for SERDES PHY.
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📌 Verification Director for SERDES PHY Systems (Mississauga)
🏢 Synopsys
📍 Mississauga