Fpga Design Engineer - $75 - $78 An Hour (Varennes)

Fpga Design Engineer - $75 - $78 An Hour (Varennes)

04 Aug
|
Stefanini Group
|
Varennes

04 Aug

Stefanini Group

Varennes

FPGA Design Engineer with 7+ years of experience in 4G/5G Radio Units, requiring expertise in System Verilog, RTL, and specific protocols like Axi and Ethernet.

📌 Fpga Design Engineer - $75 - $78 An Hour (Varennes)
🏢 Stefanini Group
📍 Varennes

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