04 Aug
|
Socket.dev
|
Toronto
04 Aug
Socket.dev
Toronto
Join Cognichip as a Senior FPGA Design Engineer, where you will blend silicon design with machine learning. Work on innovative chip designs and be part of a transformative AI-driven team. In this senior role at Cognichip, you'll create libraries, IP, and benchmarks that empower AI in chip design.
Collaborate closely with machine learning and software teams, translating silicon constraints into actionable insights. Bring your expertise in RTL design and verification to enhance our autonomous design flow while engaging in an innovative and dynamic hybrid working setting. Partner with ML teams to translate silicon constraints
- Develop high-quality RTL libraries and IP blocks
- Execute chip design methodologies from spec to bitstream
- Bachelor’s or Master’s in relevant engineering fields
- 5-10 years in RTL design and verification
- Proficiency in SystemVerilog and Python
- Your expertise in chip design and machine learning will shape the future at Cognichip.
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📌 Senior FPGA Design Engineer at Cognichip (Toronto)
🏢 Socket.dev
📍 Toronto