Principal ASIC Design Verification Engineer-16988 (Nepean)

Principal ASIC Design Verification Engineer-16988 (Nepean)

04 Aug
|
Synopsys
|
Nepean

04 Aug

Synopsys

Nepean

Date posted 04/19/2026

Category Engineering Hire Type Employee Job ID 16988 Base Salary Range $146000-$219000 Remote Eligible No Date Posted 04/19/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and driven ASIC Digital Verification Engineer with a passion for advancing technology and solving complex problems. With a solid foundation in digital design and verification,



you thrive in rapid-paced, collaborative environments and bring a proactive mindset to every challenge. You have extensive experience in verifying complex ASIC designs, utilizing advanced methodologies such as SystemVerilog and UVM, and you are adept at debugging intricate testbench and design issues. Your technical curiosity drives you to stay up-to-date with the latest industry trends and tools, while your organizational skills allow you to manage multiple priorities effectively. You value teamwork and open communication, and you are always eager to

📌 Principal ASIC Design Verification Engineer-16988 (Nepean)
🏢 Synopsys
📍 Nepean

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