Lead high-speed SerDes transmitter design at Ciena, focusing on advanced 224G and 448G solutions. Engage in high-impact projects while fostering a culture of teamwork and innovation.This role demands hands-on expertise in designing and validating high-speed transmitter circuits, aligning closely with system requirements. You will own the responsibility for schematic-level designs and collaborate with lab teams on performance evaluations. Your insights will guide architectural advancements and integration while mentoring junior engineers.Key Responsibilities:- Design and verify transmitter signal chain components- Collaborate with teams on architecture evolution- Conduct performance validation across various conditions- Drive behavioral modeling to support circuit decisions- Lead root cause analysis of performance gapsRequirements:- Bachelor’s degree in relevant engineering field- 10+ years in analog/mixed-signal design- Familiarity with Cadence, Mentor, or Synopsys tools- Excellent communication and leadership skills- Experience with SerDes and high-speed circuitsElevate your career at Ciena, where your design capabilities will shape the future of telecommunications technology.#J-18808-Ljbffr