Join AMD as a Senior ASIC RTL Design Engineer in Markham, focusing on cutting-edge designs for AI and computing technologies. Drive high-quality RTL development and support verification processes.
In this hands-on role, you will manage all aspects of IP RTL design, including architecture development, implementation, and verification. Your expertise in leveraging AI tools for RTL solutions will directly enhance design quality and accelerate time-to-market.
Collaboration with architects on next-generation server and GPU products will be key to your success.
Key Responsibilities:
Develop IP RTL for PCI Express used in various products
Collaborate on designing advanced features with architects
Apply low power techniques to ensure system performance
Focus on achieving timing, LINT, and CDC closure goals
Assist with ASIC verification and debugging processes
Requirements:
Solid background in RTL coding with Verilog HDL
AI-assisted design experience preferred
Experience managing multiple clock domains
Proficiency in lint and CDC tools
Degree in Computer/Electrical Engineering required
Advance your career with AMD in this pivotal design role.
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