Verification Engineer I — Systemverilog & Lab Validation - $76,000 - $114,000 A Year (Toronto)

Verification Engineer I — Systemverilog & Lab Validation - $76,000 - $114,000 A Year (Toronto)

03 Aug
|
Microchip Technology
|
Toronto

03 Aug

Microchip Technology

Toronto

Verification Engineer needed to verify device designs, develop testbenches and execute plans, with a market-competitive salary.

📌 Verification Engineer I — Systemverilog & Lab Validation - $76,000 - $114,000 A Year (Toronto)
🏢 Microchip Technology
📍 Toronto

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