Arm’s Solutions Engineering team is seeking experienced verification engineers to lead sub-system level PCIe and CXL verification, focusing on IO virtualization, SMMU interoperability, and performance analysis. You will craft and execute test plans, build SystemVerilog/UVM environments, and debug issues within a global team of architects and RTL engineers.
You will collaborate across design, verification methodologies, and system performance, guiding junior members while coordinating with
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📌 Lead PCIe/CXL Sub-System Verification Engineer (Ontario)
🏢 ARM
📍 Ontario
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