Become an integral part of AMD as an ASIC Design Engineer and lead the charge in developing pioneering I/O technologies for data-driven solutions. This role merges advanced design with strategic execution.
The AMD IOHUB Team is looking for a dedicated and skilled ASIC Design Engineer to focus on IP design aspects, enhancing various chips across several platforms. Your work will involve collaboration with global engineering teams to mitigate synthesis and timing challenges, ensuring top-tier quality delivery.
Your expertise will be critical in guiding project execution.
Key Responsibilities:
Grasp performance needs of IOHUB within SOCs
Drive design infrastructure decisions for successful implementation
Provide input on synthesis and layout integration
Define resource requirements for projects
Lead small teams towards development goals
Requirements:
Extensive experience in ASIC design and RTL
Expertise in Verilog and System Verilog
Familiarity with synthesis and back-end tools
Bachelor’s degree in Engineering or Computer Science
Exceptional communication and detail orientation
Utilize your design skills to influence AMD's pioneering technology solutions.
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