Elevate your career as a Senior Physical Design Engineer with Lightmatter, leading innovation in AI data center infrastructure. Leverage your expertise in advanced process nodes to tackle complex design challenges.
At Lightmatter, you will implement intricate digital blocks while working closely with top-tier scientists and engineers. This role focuses on timing closure, power integrity, and physical verification within high-performance ASICs. You will also drive techniques unique to the photonics industry, making a significant impact in your field.
Key Responsibilities:
• Implement digital blocks from synthesis to verification
• Drive full chip STA signoff and timing report debugging
• Optimize power while balancing area and performance
• Lead full chip floor planning and clock distribution
• Debug and clean up DRC/LVS issues
Requirements:
• Bachelor’s in Electrical or Computer Engineering
• 12+ years as a Physical Design Engineer
• Experience with tape-out of large ASICs
• Knowledge of timing closure and LVS/DRC
• Proficiency in TCL and Python scripting
Transform the future of computing at Lightmatter, where your design expertise can shape cutting-edge technologies.
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