- Partner with ML and Software teams as a key hardware domain expert, translating complex silicon constraints into actionable insights for model training and agentic design
- Build and maintain an ecosystem of benchmarks and evaluation infrastructure to measure and improve the quality of our tools
- Execute and refine novel chip design methodologies, from architectural specs to synthesized netlists to complete bitstreams to identify where AI can optimize the flow
- Generate and curate massive datasets of syntactic and semantic hardware code to improve model robustness
- Implement robust verification environments, writing the SystemVerilog/UVM testbenches and assertions with our tools that ensure our generated designs are correct-by-construction
- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI® solutions into their design flows.
What you must have
- Master’s degree in Computer Science, Electrical Engineering, or a closely related field.
- 5+ years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.
- Proficiency in Verilog/SystemVerilog and scripting languages like Python for automation
- Experience with digital design EDA tools such as AMD (Vivado), Altera/Intel (Quartus) ecosystems or ASIC physical design chains, including SoC and IP integrations
- Excellent written and verbal communication skills, with a solid ability to translate complex technical information into clear, actionable guidance.
- A consultative, problem-solving mindset and a passion for helping others succeed.
- Comfortable working in a dynamic, research-heavy AI-oriented startup environment
Salary/Rate Range: $200.00 – $240.00/ hour
For more information about TEEMA and to consider other career opportunities, please visit our website at
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📌 Chip Design Engineer (Toronto)
🏢 TEEMA
📍 Toronto
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