Qualcomm is seeking a Senior ASIC Design Engineer to lead innovative projects. Your role will focus on optimizing physical design and ensuring product excellence.
This position is part of the Qualcomm Engineering Group, specifically in ASIC development. You will utilize your extensive physical design experience, driving efforts from implementation to verification. Collaborating effectively with the Front-End team will be essential for successful PPA optimization and product development.
Key Responsibilities:
• Oversee backend implementation for ASIC design
• Execute clock tree synthesis and optimization
• Manage power planning and block partitioning activities
• Conduct static timing verification for timing closure
• Fix issues through rigorous physical verification processes
Requirements:
• 7+ years of relevant Physical Design experience
• Electrical or Computer Engineering degree
• Low-Power Designs and SoC design experience
• Advanced technology node experience
• Solid problem-solving and scripting skills
Utilize your expertise in ASIC design to influence Qualcomm's next-generation technologies.
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