WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.
THE ROLE:
Join AMD’s PCIe Verification team and help bring next-generation high-speed interconnect designs to life. In this role, you’ll work on leading-edge CPUs, GPUs, and accelerators, collaborating with architecture, IP design, PHY, firmware, and SoC teams. You will own the functional verification of PCIe controller, PCS, and PHY interface logic, ensuring first-pass silicon success on industry-leading technologies.THE PERSON:
We’re looking for a detail-oriented verification engineer with strong debug instincts, communication skills, and the ability to work across RTL, testbench, and firmware boundaries. Success means being highly analytical, cooperative, and eager to dive deep into complex, protocol-heavy IP.KEY RESPONSIBILITIES:
Develop and maintain UVM-based testbenches and verification environments for PCIe IPs and subsystemsWrite directed and constrained-random tests, functional coverage, and SystemVerilog assertions for PCIe Gen1-7, CXL, and related protocolsDebug RTL and testbench issues across simulation environmentsDrive functional and code coverage closure;




analyze regression results and triage failuresCollaborate with design, SoC, PHY, and firmware teams on specification reviews, bug fixes, and feature bring‑upContribute to verification methodology improvements, reusable VIP, and regression infrastructureREFERRED EXPERIENCE:
Verification experience with PCIe or other high-speed interconnect IPs (e.G., CXL, USB, Ethernet, UCIe)Hands‑on experience in SystemVerilog and UVM (stimulus, functional coverage, SVA)Familiarity with high-speed SerDes/PHY concepts and PHY-to-controller interfaces (e.G., PIPE)Experience with bring‑up activities such as link training, equalization, CDRExposure to AI/ML for engineering productivity (using copilots for testbench coding, predictive analytics, MCP tools, or regression optimization)Bonus: Experience with PCIe/CXL VIP or formal verificationACADEMIC CREDENTIALS:
Bachelors or Masters degree in Computer Engineering/Electrical Engineering preferredBenefits offered are described: AMD advantages at a glance.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.This posting is for an existing vacancy.
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📌 Senior Design Verification Engineer (Winnipeg)
🏢 Advanced Micro Devices
📍 Winnipeg