Role Plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

Responsibilities

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.

Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases.

Estimate the time required to write the recent feature tests and any required changes to the test environment.

Build the directed and random verification tests.

Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues.

Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements.

Preferred Experience

Proficient in IP level ASIC verification.

Proficient in debugging firmware and RTL code using simulation tools.

Developing UVM-based verification frameworks and testbenches, processes, and flows.

Proficient in using UVM testbenches and working in Linux and Windows environments.

Experienced with Verilog, SystemVerilog, C, and C++.

Assembly-level debugging ability.

Scripting proficiency in Perl or Python (shell/Makefile/Ruby beneficial).





Practical experience with functional and code coverage analysis and closure.

Automating workflows in a distributed compute environment.

Build and improve verification frameworks, regression quality, and automation workflows.

Exposure to leadership or mentorship is an asset.

Solves complex, novel, and non-recurring problems; initiates and leads significant method/process improvements.

Owns processes of significant technical importance, including outcomes in own area and interdependent areas.

Academic Credentials

Bachelor's or Master's degree in Computer Engineering/Electrical Engineering.

Location Markham, Ontario

EEO Statement AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

#J-18808-Ljbffr

📌 Design Verification Engineer (Markham)
🏢 AMD
📍 Markham