Become a Mixed Signal Design Engineer focused on SERDES PHY IP! Support integration, testing, and ensure robust performance across CLIENT SoC environments.
This role involves contributing to the pre-silicon integration and providing necessary post-silicon support for SERDES PHY IP. Candidates should have knowledge about signal and power integrity, as well as experience in SERDES or memory PHY design. Lab experience with functional validation is also beneficial for the team's success.
Key Responsibilities:
• Support pre-silicon integration of SERDES PHY IP
• Conduct electrical analyses for power and signal integrity
• Collaborate with post-silicon teams for testing and compliance




• Assist in characterization and production screening
• Utilize lab experience for functional validation
Requirements:
• Experience with SERDES or memory PHY design
• Understanding of power noise generation and sensitivity
• Knowledge of signal integrity basics and transmission lines
• Familiarity with clock distribution and specifications
• Lab experience in SERDES PHY validation or testing
Drive successful SERDES IP performance by leveraging your expertise as a Mixed Signal Design Engineer.
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📌 Mixed Signal Design Engineer for SERDES (Markham)
🏢 Net2Source (N2S)
📍 Markham