Elevate your engineering skills as a Digital Verification Engineer at Ciena. Focus on Forward Error Correction to validate cutting-edge ASIC technology in a adaptable work setting.

At Ciena, you will join a vibrant team of digital design engineers and architects. As a Digital Verification Engineer, you'll be engaged in innovative verification strategies, simulating key functional blocks of the advanced WaveLogic family of ASICs. Your expertise in System Verilog and object-oriented programming will lead you to create self-checking environments while collaborating closely with FEC designers and systems engineers.

Key Responsibilities: • Understand architecture and functional requirement specifications • Collaborate with FEC designers, DSP modelers,



and engineers • Validate architectural functional blocks through simulation and coverage • Develop verification and formal test plans • Create testbench environments with System Verilog, UVM or C++

Requirements: • Bachelor’s degree in Electrical/Computer Engineering or Computer Science • Robust programming skills in C/C++ and System Verilog • Detail-oriented with a focus on thoroughness and quality • Problem-solving skills with engineering principles • Willingness to learn and share knowledge

Be part of Ciena's mission to innovate in high-speed connectivity technology!

📌 Digital Verification Engineer At Ciena Ahuntsic
🏢 Ciena
📍 Ahuntsic