Elevate your career as a Senior ASIC Verification Engineer focused on developing advanced verification infrastructure. Join a agile team to create cutting-edge protocols for complex digital designs.
This position requires a bachelor's degree in computer science or electrical engineering, with a master's preferred, and at least 8 years of ASIC verification experience. You will be responsible for defining and executing test plans and creating System Verilog and UVM-based traffic generators. Your role will have a significant impact on ensuring high-quality designs through deep understanding of verification methodologies and scripting.
Key Responsibilities:
• Lead development of ASIC verification infrastructure
• Create System Verilog/UVM-based protocols and checker generators




• Develop and execute comprehensive test plans
• Define and run self-checking tests for digital ASICs
• Collaborate with distributed teams via effective communication
Requirements:
• Bachelor’s degree in computer science or electrical engineering
• 8+ years of ASIC verification experience
• Proficiency in System Verilog and Python
• Robust grasp of UVM methodology
• Experience with functional coverage and formal verification tools
Utilize your verification skills to drive excellence in ASIC design projects, leading advancements in technology.
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📌 Senior Asic Verification Engineer Role Ottawa (Canada)
🏢 Myticas Consulting
📍 Canada