- Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors
- As we push performance boundaries, we’re reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience
- This is a rare chance to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent
- This role is hybrid, based out of Toronto, ON, Austin, TX or Santa Clara, CA
- Profile & Analyze: Dissect cutting-edge AI workloads to identify execution bottlenecks and translate those insights into definitive CPU performance requirements
- Architect High-Performance Cores: Drive the microarchitecture of custom RISC-V CPU cores, balancing aggressive Performance, Power, and Area (PPA) targets
- Innovate the ISA:



Design and implement custom instructions that unlock massive performance gains without sacrificing compiler programmability or developer velocity
- Cross-Functional Collaboration: Partner tightly across compiler, software, and hardware teams to co-design Tenstorrent’s next-generation AI compute architecture

- Hardware-Software Co-Designer: Driven to architect custom instruction set extensions and validate their performance gains against real-world workloads
- Ways to stand-out: Familiarity with open-source RISC-V cores, AI-based agentic workflow experience
- Experienced Microarchitect: 10+ years of deep expertise in CPU performance modeling and microarchitecture design
- AI Workload Expert: Deeply familiar with the computational and memory bottlenecks of modern AI workloads, particularly Large Language Models (LLMs)

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📌 Principal CPU Microarchitect (RISC-V & AI Compute) (Toronto)
🏢 Tenstorrent
📍 Toronto