Apply on Kit Job: kitjob.ca/job/2g96v4

Drive innovation in ASIC physical design as Lead Engineer for Test Chips. Ensure high-quality implementation and validation across advanced SoC and test chip projects with cutting-edge methodologies.
This leadership role focuses on the design implementation of complex test chips from RTL to GDS release. Your responsibilities include crafting floor plans, managing design flow, and ensuring rigorous verification processes are adhered to. You will work closely with cross-functional teams to rapid-track project timelines and enhance product reliability.
Key Responsibilities:
• Manage implementation of physical designs across protocols
• Develop optimized floorplan and power strategies
• Supervise static timing and physical verification tasks




• Lead the automation of design processes
• Prepare all documentation essential for tape-out
Requirements:
• 9+ years of ASIC physical design expertise
• In-depth understanding of design phases and verification
• Skilled in tools like IC Compiler and PrimeTime
• Proven ability to coordinate cross-functional projects
• Authorized to work in the USA
Leverage your leadership skills to enhance design processes and contribute to next-gen product developments across the semiconductor landscape.
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Apply on Kit Job: kitjob.ca/job/2g96v4

📌 ASIC Physical Design Lead for Test Chips (Ottawa)
🏢 Synopsys
📍 Ottawa