Join as an Advanced Node PLL Design Engineer focused on innovative clocking solutions. Contribute to high-speed interconnect technology powering next-generation AI applications.
In this role, you'll leverage your 5+ years of experience in PLL design, working on high-speed optical transceivers. A Master’s degree or PhD in Electrical Engineering is essential as you will architect and simulate various PLL structures. This role involves ensuring top-notch performance in advanced node technologies while providing essential support during lab characterization.
Key Responsibilities:
• Evaluate PLL topology trade-offs for specifications
• Architect and simulate analog/mixed-signal PLL components
• Overcome challenges in advanced technologies
• Supervise design layout for accuracy
• Execute system-level simulations for PLL integration
Requirements:
• Master’s or PhD in related fields
• 5+ years experience in PLL design
• Knowledge of advanced fabrication processes
• Proficiency in Cadence Virtuoso and EM simulation
• Solid communication abilities
Drive innovation in high-speed interconnects by utilizing your advanced PLL expertise in a dynamic engineering environment.
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